The age of wearable electronics is upon us as witnessed by the fast growing array of smart watches, fitness bands and other advanced, next-generation health monitoring devices such as electronic stick-on tattoos. In order for these wearable sensor devices to become fully integrated into sophisticated monitoring systems, they require wireless interfaces to external communication devices such as smartphones. This requires far-field communication systems that, like the sensor systems, perform even under extreme deformations and during extended periods of normal daily activities.
The noise level in devices with graphene and other two-dimensional (2D) materials has to be reduced in order to enable their practical applications. It will not be possible to build graphene-based communication systems or detectors until the noise spectral density is decreased to the level comparable with the conventional state-of-the-art transistors.Researchers have now demonstrated that the electronic noise in graphene devices can be strongly suppressed if a graphene channel is encased between two layers of hexagonal boron nitride.
An international research team has designed and demonstrated novel self-powered human-interactive transparent nanopaper systems, utilizing transparent nanopaper as base material. This nanopaper system is based on an electrostatic induction mechanism and a dielectric material. That makes them self-powered, i.e. able to operate without the need for external power. The basic working mechanisms of the resulting devices are electrostatic induction effects caused by the retaining charges.
Researchers have developed a simple double-transfer printing technique that allows them to integrate high performing electronic devices - featuring state-of-the-art, non-planar, sub-20nm FinFET devices - fabricated on novel flexible thin silicon sheets with several kinds of materials exhibiting complex, asymmetric surfaces including textile, paper, wood, stone, and vinyl. This process utilizes soft materials to integrate nonplanar FinFET and planar traditional MOSFET devices onto various wavy, curvilinear, irregular, or asymmetric surfaces.
Researchers have demonstrated the fabrication flexible ferroelectric random access memory (FeRAM) devices using state-of-the-art CMOS processes (sputtering, photolithography, and reactive ion etching). This bridges the existing gap between rigid inflexible semiconductor high performance, integration density, yield, and reliable electronics and highly flexible polymer/hybrid materials based relatively low performance electronics. This enables combining the best of two worlds to obtain flexible high performance electronics.
The key challenges associated with the development of high performance MEMS and NEMS resonators for RF wireless communication and sensing applications are the isolation of energy-dissipating mechanisms and scaling of the device volume in the nanoscale size-range. Researchers show that graphene-electrode based piezoelectric NEMS resonators operate at their theoretical 'unloaded' frequency-limits, with significantly improved electromechanical performance compared to metal-electrode counterparts, despite their reduced volumes.
Researchers present materials and device design/fabrication strategies for an array of highly stable and uniform SWCNT-based stretchable electronic devices consisting of capacitors, charge-trap floating-gate memory units, and logic gates (inverters and NAND/NOR gates). The researchers' detailed material, electrical, and mechanical characterizations and theoretical analysis in mechanics provide useful insights in the design and development of SWCNT-based wearable electronic systems.
Classical semiconductor physics suggests that a single charge transport CMOS device cannot achieve ultra-high-performance and ultra-low-standby-power at the same time. Nanoelectronics researchers are trying to design devices that hit the 'sweet spot', i.e. where a charge transport device can provide its highest performance at its lowest power consumption, especially in its 'off' state.
In new work, researchers show a unique device concept which combines the advantages of a tunnel field-effect transistor for ultra-low OFF (leakage) current and ultra-steep sub-threshold slope for sharper and faster ON and OFF switching due to the FET's nanotube architecture.