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R&D Engineer OPC and Design Technology Co-Optimization
Imec performs world-leading research in nano-electronics. Imec leverages its scientific knowledge with the innovative power of its global partnerships in ICT, healthcare and energy. Imec delivers industry-relevant technology solutions. In a unique high-tech environment, its international top talent is committed to providing the building blocks for a better life in a sustainable society. Imec is headquartered in Leuven (Belgium) and has offices in the Netherlands, US, Taiwan, China, India and Japan. Its staff of more than 2,080 people includes over 550 industrial residents and guest researchers.
The Advanced Patterning Center (APC) is a joint initiative launched by imec and ASML to address the upcoming scaling challenges associated with the chip industry’s move towards single digit nanometer dimensions. The center is located at the imec campus in Leuven (near Brussels) and is expected to grow continuously over the next couple of years. The APC is associated with the imec Supplier Hub, an initiative involving many leading edge semiconductor equipment suppliers, aimed at creating a collaborative environment to investigate the practical interactions between all the different steps in the chip patterning process. The APC and Supplier Hub will use actual devices to analyze and optimize process steps as well as materials and device architecture choices, while applying integrated metrology. For the APC we are looking for an R&D Engineer OPC and Design Technology Co-Optimization (m/f).
You will develop and qualify OPC technology on imec 7nm node and beyond. Therefore you possess strong lithography/OPC knowledge in FEOL and/or BEOL; and good understanding of high performance CMOS patterning/design integration. You are experienced in lithography/OPC process development and must be capable of collaborating with process integration development teams, as well as designers. Previous technology development experience is a plus.
Specific responsibilities will include:
Development of OPC technology for imec 7nm node and beyond.
Definition/assessment of Design Rules for imec 7nm node and beyond.
Collaboration with EDA partners on innovative computational lithography solutions.
You have a PhD or Master degree and 2 to 3 years industrial experience in Optics, Mathematical Engineering, or Computer Science.
You have minimum 2 years of experience in OPC, including lithography simulation, modeling, RET, or DFM (Design for Manufacturing).
You have working knowledge of industrial grade OPC/Lithography software (Mentor Graphics and/or Brion).
You possess strong problem solving and innovative thinking skills.
Hands-on cleanroom (process and equipment) experience is preferred.
Experience in semiconductor processing, in particular lithography, is a plus.
You are able to work independently with minimum supervision.
You must have excellent English communication skills (written and verbal), knowledge of Dutch is not necessary.
Apply online at www.imec.be/jobs.
For more information on the APC launch kindly refer to http://www2.imec.be/be_en/press/imec-news/imecasml.html