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Posted: Nov 11, 2010

SUSS MicroTec and Fraunhofer IST Introduce New Technology for Selective Surface Treatment

(Nanowerk News) SUSS MicroTec, a global supplier of equipment and process solutions for the semiconductor industry and related markets, and Fraunhofer for Surface Engineering and Thin Films IST today announced the launch of SELECT, a technology for bond aligner and mask aligner that selectively activates parts of wafer surfaces through plasma. Local treatment of the surface prior to wafer processing replaces standard process steps and reduces the overall cost per wafer. Selective plasma activation can be applied to a variety of MEMS, optical and solar applications using direct wafer bonding or surface modification for the creation of micro mirror arrays, micro valves, sensors or micro fluidic channels. The SELECT toolkit is an upgrade option of SUSS MicroTec's MA/BA8 Gen3.
The patent pending technology of Fraunhofer IST bases upon atmospheric pressure plasma selectively modifying the molecular level surface. Conventional surface treatment of complete wafers without selection can damage the functionality of micro components or electronics. With selective treatment it is possible to protect those sensitive areas by activating only specific parts of the wafer. Selective plasma activation is used with planar wafers as well as with topography wafers where plasma activation is provided either in the cavities or on the elevated structures.
"While selective plasma treatment in wafer bonding applications significantly reduces the post-bond anneal temperature from 1000°C down to 200°C, it also protects sensitive devices. The technology therefore impressively increases the process window for direct bonding", said Prof. Dr. Günter Bräuer, the director of the Fraunhofer IST. "With SUSS MicroTec's SELECT toolkit applied in both direct bonding as well as other wafer processing applications a ground-breaking new approach seems possible for device processing in the semiconductor industry."
"The treatment of selected parts of wafers reduces the costs of producing a device through streamlining processes and increasing throughput at the same time", explained Frank Averdung, President and CEO of SUSS MicroTec AG. "The new technology has the potential to completely change the cost-of-ownership model for a large variety of applications. This creates an interesting opportunity for the customers of our latest manual mask aligner generation."
About SUSS MicroTec
SUSS MicroTec is a leading supplier of equipment and process solutions for microstructuring in the semiconductor industry and related markets. In close cooperation with research institutes and industry partners SUSS MicroTec contributes to the advancement of next-generation technologies such as 3D Integration and nanoimprint lithography as well as key processes for MEMS and LED manufacturing.
With a global infrastructure for applications and service SUSS MicroTec supports more than 8,000 installed systems worldwide. SUSS MicroTec is headquartered in Garching near Munich, Germany. For more information, please visit
About Fraunhofer IST
As an industry-oriented R&D service center, the Fraunhofer Institute for Surface Engineering and Thin Films IST is pooling competencies in the areas of film deposition, coating application, film characterization, surface analysis, and equipment development. A large number of scientists, engineers, and technicians work to provide various types of surfaces with new or improved functions and, as a result, help create innovative marketable products. On an office and laboratory area of more than 4000 square meter 106 tenured employees are involved in a variety of research projects. The Fraunhofer IST is located in Braunschweig, Germany. For more information, please visit
Source: SUSS MicroTec (press release)
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