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Posted: Jun 16, 2011
Improving solar cells with the microelectronics toolbox
(Nanowerk News) To make solar energy generation cost-effective, the PV industry has to reduce its manufacturing costs well below 1 euro/Wp. This holds for all PV technologies. To reach that ambitious goal, the crystalline Si based PV industry will have to increase the solar cell's efficiency while at the same time reducing the amount of high-purity Si that is used. But this requires developing advanced cell concepts that put more stringent requirements on process steps such as doping, cleaning and surface passivation. Several processes in the technology toolbox of CMOS are attractive to meet these stringent requirements. We can adopt these tools to decrease the solar cells euro/Wp, but we will have to 'solarize' them, adapting them to the needs and requirements of the PV industry.
Major technological changes lie ahead of us if we want to manufacture wafers, solar cells and modules at a cost significantly below 1 euro/Wp. Take the imec roadmap for example, where we target to reduce the amount of pure Si needed per Wp by combining efficiencies beyond 20% with aggressive reductions in wafer thicknesses. We foresee that the industry will gradually move to back-contact solar cells, which may eventually become as thin as 80 or even 40µm if novel techniques to realize and handle such thin Si foils become available. But engineering these cells of the future implies that we re-consider contamination issues, control of doping profiles, introduction of new materials etc., thereby taking advantage of the process knowledge associated with IC manufacturing.
An example is the need for improved surface passivation techniques that give us sub-nm control. Traditional passivation schemes for Si solar cells – based on silicon nitride – are not good enough for cell types with efficiencies much above 20%. A promising solution is to deposit negative charge dielectrics such as Al2O3 by means of atomic layer deposition (ALD).
In addition, we will need very efficient cleaning methods to reduce metal contamination. This will allow us to maintain and increase the lifetime of the minority carriers in our future thin Si cells. Also, if we want to reach the ultimate in cell performance, we should be able to control the dimensions of the doping profiles. With traditional diffusion-based doping, attaining this level of control for shallow emitters is not obvious. Ion implantation with its excellent areal uniformity gives us a good alternative. And finally, by using electroplated Cu we can avoid the need for Ag in the metallization. Replacing Ag by Cu not only decreases the cost, it can also improve the cell's current and open circuit voltage. But the use of Cu requires a diffusion barrier that prevents the metal from diffusing into Si. The experience with barrier technology built up within the CMOS community can be a good starting point.
All these examples suggest that we can simply copy processes from CMOS manufacturing into our PV lines. But does this make sense? The answer is: definitely not. The throughput of techniques such as ion implantation and ALD is much too low, and the cost of most of these techniques is way too high for use in the PV industry. Rather, we must look how we can adapt the CMOS knowledge and techniques to the benefit of the PV community. We must 'solarize' the CMOS toolbox – in view of this one objective: reducing the euro/Wp. Today, we can already witness the first steps in this direction: equipment manufacturers are coming up with new solutions, and first solar cells made with new process steps like Cu metallization and ALD-based surface passivation look promising.
Source: By Jef Poortmans, Department Director Solar and Organic Technologies, imec
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