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Soitec Outlines Fully Depleted Product Roadmap for Advanced Planar and Three-Dimensional Transistors

Available now, fully depleted wafers from Soitec, pre-integrate critical characteristics of the transistor within the wafer structure itself. Soitec's fully depleted wafers offer an early, low-risk migration at the 28nm node down to 10nm and beyond, lowering costs and enabling significant advances in the performance and power efficiency of mobile devices such as smartphones and tablets.

Apr 17th, 2012

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