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Posted: February 19, 2010
Silicon Frontline Technology Announces New Version of its Flagship Post-Layout Verification Products
(Nanowerk News) Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company in the post-layout verification market , announced today that new versions of its flagship post-layout verification products, F3D (Fast 3D) for fast 3D extraction and R3D (Resistive 3D) for 3D extraction and analysis of large resistive structures like power devices, are shipping now. F3D improves its performance by up to 10x when compared to the previous version. F3D and R3D also accommodate larger designs than the previous versions announced in May 2009.
According to Dermott Lynch, VP Marketing at Silicon Frontline, "To address our customers' post-layout verification needs as their technology options change, we are focused on improving our software products' performance and our products' capacity to handle full-chip designs."
F3D is chosen for providing nanometer and Analog Mixed Signal (A/MS) design accuracy and R3D for its ability to improve the reliability and efficiency of semiconductor power devices.
F3D and R3D incorporate patent-pending 3D technology to deliver a Guaranteed Accurate solution for full-chip, post-layout verification. They work in industry standard flows allowing simpler adoption and quicker closure, with guaranteed accuracy, of the post-layout verification loop.
What's New: Capacity and Performance
The latest version of Silicon Frontline's 3D Field Solver technology accomplishes full-chip extraction with Field Solver accuracy and improves its performance and capacity. Typical examples of F3D running with Guaranteed Accuracy are a 65nm SOC run in under 2 hours (in the previous version this took 10 hours); MOMCaps run in under 1 minute (in the previous version this took 3 minutes and can take over 7 hours with most commercial Field Solvers).
A tiling feature allows design size for F3D and R3D to be unlimited.
Designs can be automatically partitioned into blocks of up to 4-million transistors and each block can be run using one CPU or multiple CPUs can run a number of design blocks in parallel. In the previous version the block size was limited to a maximum of 1-million transistors.
These results are not possible with commercial tools available today.
Why Users Pick Silicon Frontline
Guaranteed Accurate Post-Layout Verification Technology
Silicon Frontline's post-layout verification software guarantees accuracy and high performance by using rigorous 3D technology to extract parasitics.
Users have the option to specify the level of accuracy desired, net by net, at the block level or with regular expressions. By guaranteeing accuracy, Silicon Frontline is ensuring the resulting parasitics are correct within the user-specified accuracy.
Support for Standard and Advanced Nanometer Processes
The Silicon Frontline software has been qualified by major foundries for accuracy, performance, and capacity as well as integration with major physical verification systems. They are used for designs that target mature process technologies or advanced process technologies such as low as 28nm.
Accurate Advanced Field-Solver Technology, Better
For a 40nm design F3D delivered results within 2% of silicon, competing tools were up to 30% off.
Technology, Users, Target Applications
The technology in Silicon Frontline's products is a combination of a rigorous 3D extraction method with a highly efficient 3D geometric engine yielding significant performance improvement and handling additional issues such as thickness variation due to CMP, width variation due to optical and other manufacturing effects. The software generates a fully annotated SPICE netlist with parasitics for use by downstream tools. It is used by CAD, TCAD and post-layout verification engineers.
F3D is ideally suited for sensitive analog and AMS circuits where coupling is a challenge -- ADCs, DACs, circuits with differential signals, MIM/MOMCaps and 3D devices, image sensors, RF and high speed designs and for circuits manufactured at advanced technology nodes, such as 65, 40 and 32nm. R3D target applications include discrete or embedded power devices, where efficiency and reliability are important, as well as designs requiring analysis of large metal interconnects.
Silicon Frontline Technology, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company's software products improve silicon quality for standard and advanced nanometer processes.