Posted: June 5, 2010

POLYTEDA Announces Availability of Foundry-validated Runsets at UMC

(Nanowerk News) POLYTEDA Software Corporation, a provider of advanced verification solutions, today announced the completion of a joint qualification program for POLYTEDA's PowerDRC/LVS product for leading global semiconductor foundry UMC's 65nm processes and the availability of foundry-validated runsets for PowerDRC/LVS.
With optimized runsets like PowerDRC/LVS, designers have access to a fast, accurate, and cost-effective signoff solution that accelerates time to market and improves manufacturability of chips targeted for UMC's 65nm process technology. UMC's 65nm technology features the efficient 65nm Low Leakage (LL) process for low power handheld and wireless devices, and the 65nm Standard Performance (SP) process for performance-oriented SoC designs.
"UMC is committed to providing customers with leading-edge design and manufacturing solutions that help ensure silicon success," said Stephen Fu, Director of IP Development and Design Support at UMC. "We worked closely with POLYTEDA to qualify PowerDRC/LVS for our 65nm process. POLYTEDA's technology demonstrates tool capabilities that help our customers to address complex system-on-chip design challenges. We expect customers to benefit greatly from this collaboration."
"IC designers need fast, accurate and affordable physical verification solutions to get silicon out the door on time and under budget," said Brad O'Connell, Vice President of Sales and Marketing for POLYTEDA. "We are pleased to be partnering with UMC to enable customers to move silicon to their customers economically, efficiently and with utter predictability."
POLYTEDA Software Corporation is a rapidly growing design automation company, focused on providing fast, accurate and affordable design verification solutions for electronic product companies.
Source: POLYTEDA (press release)
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