ScanNano Announces Further Progress in the Development of its Deep Vacuum Gap Technology

(Nanowerk News) Dr. Andrei Pavlov, President and Founder of ScanNano Tek announced further progress in its R&D Program, demonstrating the validity of its Deep Vacuum Gap Technology for the production of new MEMS devices. This follows ScanNano Tek's October 2, 2011 announcement about encouraging progress in a new R&D Program in which STMicroelectronics, for its CMOS technology expertise, is engaged.
This program is intended to design, prototype and evaluate, MEMS devices, using ScanNano's Deep Vacuum Gap (DVG) manufacturing technology, which is protected by filed patent applications in the United States and under the Patent Cooperation Treaty (PCT) seeking worldwide patent protection. In this first-stage, the devices will be directed mainly towards Radio Frequency (RF) applications (e.g. RF switches, variable capacitors and integrated circuits) in the telecommunications market. The program will also evaluate the design and cost benefits expected from using DVG Technology at the commercial production stage.
Dr Pavlov explained that, "Our experiments show that nanogaps can be accurately formed using DVG technology. An SEM cross-section picture (below), demonstrates how an initial structure, comprising a few thin DVG layers (on the left photograph) transforms, after diffusion, to reveal the formation of the nanogap inside the structure (right photograph). These cross sectional pictures are the first visual evidence that small gaps can be made inside a material without external etching and without use of sacrificial materials. The size of the gap is around 20 nm".
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"With the use of DVG technology, completely new advanced designs of new MEMS and nano-MEMS devices can be made and designers are not limited by MEMS-specific fabrication procedures. Now it is possible to introduce one or more gaps inside a device with any geometrical shape, horizontal or vertical, having an area ranging from a few, to hundreds, of square microns".
Present technology requires the use of a sacrificial layer and an etching process which limits the minimum size of the gap, because it is more difficult to etch thinner sacrificial layer materials underneath the top structure. Accordingly, the sensitivity of the MEMS structure is lower for larger gaps and higher power is needed to control the devices. Furthermore, most traditional MEMS devices require a vacuum in the gap and therefore, require special protection from ambient atmosphere, such as sealing and encapsulation. Because ScanNano's DVG devices can be produced very accurately at the NANO scale, many more devices can be accommodated in the same space, offer lower power consumption and encapsulation is not necessary. Furthermore, the demanding requirements associated with current MEMS/NANO technologies limits the range of qualified manufacturing facilities. On the other hand, ScanNano's DVG technology permits its implementation in conventional CMOS manufacturing facilities. And because encapsulation is not required, material and manufacturing costs are significantly reduced.
About ScanNano Tek
ScanNano Tek is a private Finnish Research and Development company, specialising in MEMS technology at the nano scale. Its DVG technology has many applications in the fields of NEMS and MEMS and a variant has been developed for highly efficient solar cell photo-voltaic devices. Scannano works with customers' design engineers to apply its DVG technology to specific functional requirements and existing manufacturing facilities.
Source: ScanNano Tek (press release)
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