Researchers demonstrate world's first qubit device fabricated in standard CMOS process

(Nanowerk News) Leti, an institute of CEA Tech, along with Inac, a fundamental research division of CEA, and the University of Grenoble Alpes have achieved the first demonstration of a quantum-dot-based spin qubit using an industry-standard fabrication process.
Published in the November 24 issue of Nature Communications ("A CMOS silicon spin qubit"), and the topic of an invited paper at IEDM 2016, this proof-of-concept breakthrough uses a device fabricated on a 300-mm CMOS fab line. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, and the second one defines a quantum dot used for the qubit readout. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate.
Semiconductor spin qubits reported so far were realized in academic research facilities. Unlike those demonstrations, the present research achievement relies on the technology of FDSOI field-effect transistors. The standard single-gate transistor layout is modified in order to accommodate a second closely spaced gate, which serves for the qubit readout.
Another key innovation lies in the use of a p-type transistor, meaning that the qubit is encoded by the spin of a hole and not the spin of an electron. This specificity makes the qubit electrically controllable with no additional device components required for qubit manipulation.
“Our one-qubit demonstrator brings CMOS technology closer to the emerging field of quantum spintronics,” said Silvano De Franceschi, Inac’s senior scientist.
Maud Vinet, Leti’s advanced CMOS manager and a co-author of the paper, said, “This proof-of-concept result, obtained using a CMOS fab line, is driving a lot of interest from our semiconductor industrial partners, as it represents an opportunity to extend the impact of Si CMOS technology and infrastructure beyond the end of Moore’s Law. The way toward the quantum computer is still long, but CEA is leveraging its background in physics and computing, from technology to system and architecture, to build a roadmap toward the quantum calculator.”
While superconducting circuits are already providing basic “quantum processors” with several qubits (up to nine), spin qubits in silicon are at a much earlier stage of development. The immediate next steps will be demonstrating a few (n>2) coupled qubits, and developing a strategy for long-range coupling of qubits.
In the long run, “leveraging the integration capabilities of CMOS technology will be a clear asset for large-scale qubit architectures,” said De Franceschi. “Within a European collaborative project (see, we are also developing cryogenic CMOS electronics for the future co-integration of silicon qubits and classical control hardware.”
The specific added value of thin-film FDSOI is having a back-gate, which can be used to tune the QD electrical state or the dot-to-dot coupling. That avoids the need for an overlapping top gate and the need to deal with the crosstalk. An additional advantage is that conventional FDSOI comes with undoped channels, which is expected to be an advantage for co-integrated control electronics.
It is anticipated that the built-in parallelism in the treatment of quantum information will open new perspectives for cryptography, database searching and simulation of quantum processes. This opportunity is triggering major research initiatives all around the world and, because of that, significant progress can be expected in the coming years.
Silvano De Franceschi, INAC’s senior scientist, will present an invited paper entitled “SOI Technology for Quantum Information Processing” at IEDM 2016, Tuesday, Dec. 6.
Source: CEA Leti