Posted: Oct 13, 2010 | |
SEMATECH Gate-Stack symposium identifies post-22 nm strategies |
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(Nanowerk News) Participants at the recent 7th Annual International Symposium on Advanced Gate Stack Technology discussed strategies for implementing advanced logic and memory technologies for sub-16 nm node and beyond process technologies. | |
The Symposium, hosted by SEMATECH, drew more than 100 international researchers from industry and academia that shared recent discoveries and outlined new gate stack strategies for the 16 nm technology generation and beyond. | |
"We are very pleased with the global participation in the conference, and with the outcome – in the exploration of solutions for functional stacks for future devices," said Paul Kirsch, SEMATECH's director of front end processes. "The Symposium's success can be attributed to the breadth and depth of its participants and their research findings. SEMATECH will continue to work collaboratively with the industry on fundamental issues on extending CMOS logic and memory technologies." | |
The technologies covered were high-k/metal gate stacks for Silicon (Si), Silicon Germanium (SiGe), III-V high performance MOSFETs, metal/high-k/metal stacks for resistance change memory, flash memory, and phase change memory. | |
Key observations include: | |
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Other findings disclosed at the Symposium: | |
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The International Symposium on Advanced Gate Stack Technology is part of the SEMATECH Knowledge Series, a set of public, single-focused industry meetings designed to increase global knowledge in key areas of semiconductor R&D. | |
About SEMATECH | |
For 20 years, SEMATECH® (www.sematech.org) has set global direction, enabled flexible collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the next technology revolution with our nanoelectronics and emerging technology partners. |
Source: SEMATECH |
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