Nanotechnology resource: a detailed review of electrical contacts in one and two dimensional nanomaterials

(Nanowerk News) Researchers from the NIST Center for Nanoscale Science and Technology and Sandia National Laboratories have published a detailed review of recent experimental and theoretical work highlighting the unusual physics and material science of electrical contacts to nanostructures.
In the Nature Nanotechnology article ("Electrical contacts to one- and two-dimensional nanomaterials"), the researchers explain that existing models of electrical contacts in bulk semiconductor devices are inapplicable at the nanoscale, and argue that in order for nanosystems to progress to practical use, it is critical to control charge at the electrical contacts. New models are required to understand contact formation and charge transport.
In conventional contacts, the interface between a metal and a semiconductor is planar, but nanocontacts have multiple possible geometries, each with unique properties. The kinetics and thermodynamics of metal/nanostructure interfaces also differ from those of the bulk due to their small lateral dimensions and to the greater ability of nanostructures to accommodate strain.
Three examples illustrate the range of contacts that are possible with different nanomaterials.
First, abrupt epitaxial silicide/silicon nanowire junctions with novel orientations can be formed at temperatures well below those required for thin metal films, providing new opportunities for emerging devices such as metal source-drain MOSFETs and SpinFETs.
Second, for metal contacts to carbon nanotubes, catalytically driven carbonization of the interface results in an electrically transparent graphene-CNT contact.
Finally, making low resistance ohmic contacts to semiconductor nanowires has proven challenging and requires new understanding of doping at the nanometer scale.
The researchers conclude that better understanding of the basic science of nanoscale contacts is necessary to allow nanoscale materials to be incorporated into useful new device designs.
Source: NIST
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