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Posted: October 14, 2008
IMEC develops innovative architecture for flexible forward error correction
(Nanowerk News) IMEC has developed an innovative
architecture for flexible forward error correction (FEC). The solution
targets data transmission applications that need to combine flexibility,
high throughput, and low power consumption. Examples are future wireless
terminals and optical storage.
IMEC's FEC enables, on one processor, the
turbo- and LDPC decoding of major communication standards. The technology
is available for the industry either through a soft IP transfer, or through
joint R&D projects.
IMEC's FEC solution supports both turbo- and LDPC coding, including
multi-channel operation over different modes. It is the world's first
application-specific integrated processor (ASIP) for flexible FEC enabling
both turbo- and LDPC coding for 3rd generation mobile phones (3GPP-LTE),
wireless networks (IEEE802.11n, IEEE802.16(e)) and television broadcasting
Support for other convolutional turbo- or LDPC codes
can be enabled through assembly programming. A combined multiprocessor and
ultra-wide SIMD (single instruction, multiple data) approach achieves
scalability, high throughput and high energy efficiency.
FEC throughput for various supported standards
The preliminary estimates for throughput and energy consumption show that
IMEC's FEC solution is competitive with solutions that separate turbo and
LDPC decoding on dedicated hardware. The throughput that is achieved is
between 0.07 and 1.25Mbps/MHz, with efficiencies from 0.3 to 0.5nJ/bit/iter
in turbo mode and 0.08 to 0.1nJ/bit/iter in LDPC mode. The silicon area
used by the flexible solution is comparable to the sum of multiple
The new flexible FEC fits in IMEC's research strategy to design flexible
components for data transmission. These are targeted at, amongst others,
future mobile terminals; they combine high throughput, low power
consumption, and a small footprint. Other IMEC components that follow this
vision are a flexible RF transceiver and a flexible baseband chip.
invites partners to collaborate in this research through its joint research
programs. Industrial players can also profit from IMEC's research by
licensing the components.
FEC is used in all digital transmitters and receivers to ensure that the
digital message is sent free of errors. When the transmitter sends a
message, it encodes the bit stream, adding redundant data. These allow the
receiver to detect and correct errors - within some bounds - without asking
the transmitter for additional data. State-of-the-art FEC mainly uses 2
methods of FEC coding: turbo codes and LDPC codes. These are popular
because they allow high-speed FEC encoding and decoding. But turbo codes
and LDPC codes are complex, and decoding them puts a heavy computational
load on the receiver. Therefore, until recently, FEC decoders for the
different FEC methods were implemented as dedicated hardware blocks,
focusing on minimum power consumption and area, and thereby sacrificing
IMEC is a world-leading independent research center in nanoelectronics and
nanotechnology. IMEC vzw is headquartered in Leuven, Belgium, has a sister
company in the Netherlands, IMEC-NL, offices in the US, China and Taiwan,
and representatives in Japan. Its staff of more than 1600 people includes
more than 500 industrial residents and guest researchers.
IMEC's More Moore research aims at semiconductor scaling towards sub-32nm
nodes. With its More than Moore research, IMEC looks into technologies for
nomadic embedded systems, wireless autonomous transducer solutions,
biomedical electronics, photovoltaics, organic electronics and GaN power
IMEC's research bridges the gap between fundamental research at
universities and technology development in industry. Its unique balance of
processing and system know-how, intellectual property portfolio,
state-of-the-art infrastructure and its strong network worldwide position
IMEC as a key partner for shaping technologies for future systems.
Further information on IMEC can be found at www.imec.be.