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Posted: Jul 01, 2015

Flexible FeRAM fabricated with CMOS-compatible approach

(Nanowerk Spotlight) Making electronic devices flexible, stretchable, and even transparent has been a major research focus for quite a number of years now. By using new materials – e.g. carbon nanotubes and graphene – and designing new tools – e.g. inkjet printing – researchers have made vast strides towards flexible electronics (see for instance: "Inkjet printing of graphene for flexible electronics" or "Fully transparent, rollable electronics built with a graphene/carbon nanotube backbone").
To migrate these devices from laboratory research to large-scale industrial fabrication is still a challenge given the industry's massive investment in silicon technologies and infrastructure. Silicon-based CMOS devices still account for about 90% of today's electronics.
That's why research into flexible silicon-based devices is an attractive alternative. Take for instance a recent research report that demonstrates a high performance flexible storage device based on ferroelectric material: lead zirconium titanate (PZT).
In this work, reported in Advanced Electronic Materials ("Thin PZT-Based Ferroelectric Capacitors on Flexible Silicon for Nonvolatile Memory Applications"), researchers fabricate flexible ferroelectric random access memory (FeRAM) devices using state-of-the-art CMOS processes (sputtering, photolithography, and reactive ion etching).
Fabrication process flow for flexing the silicon substrate
Fabrication process flow for flexing the silicon substrate. a–c) Silicon substrate with prefabricated FeRAM devices undergoes soft etch back process (upside down) to thin down the substrate to achieve d) an ultrathin version of flexible silicon with prefabricated devices. (Reprinted with permission by Wiley-VCH Verlag)
"Our findings bridge the existing gap between rigid inflexible semiconductor high performance, integration density, yield, and reliable electronics and highly flexible polymer/hybrid materials based relatively low performance electronics," Muhammad Mustafa Hussain, an Associate Professor of Electrical Engineering at King Abdullah University of Science and Technology (KAUST), who led the team, tells Nanowerk. "This enables combining the best of two worlds to obtain flexible high performance electronics."
"We capitalize on the existing standard CMOS fabrication processes and the well-established infrastructures to transfer the perks associated into the flexible arena through novel pragmatic microfabrication techniques to reduce the thickness of traditional silicon wafers and make today’s electronics flexible," he adds.
He points out the specific results that the team specifically shows in this work: 1) record polarization, capacitance, and endurance (1 billion write-erase cycles) values reported to date for flexible ferroelectric capacitors for non-volatile memory applications; 2) uncompromised retention ability under varying dynamic stress; and 3) a minimum bending radius of 5 mm.
Lead zirconium titanate (PZT) ferroelectric capacitors are already commercially used in embedded FeRAMs non-volatile memories. Hence, the technology is relatively mature.
However, to obtain these PZT films a high crystallization temperature (700°C) is required to achieve the desired structural form. This temperature is way beyond the melting temperature (∼200°C) of most polymeric substrates that are inherently flexible.
Therefore, researchers have been looking into alternative ferroelectric polymers to replace PZT in flexible applications. This imposes more challenges concerning the ability to integrate the devices with complementary metal-oxide-semiconductors (CMOS) based circuitries which also require high thermal budgets and require silicon for optimized high performance.
"Our work utilizes the strong inverse proportionality relation between a material's thickness and its flexural modulus," explains Mohamed T. Ghoneim, a PhD student in Hussain's group and the paper's first author. "Hence, a slight decrease in thickness results in immense gains in flexibility. This enables transforming the rigid silicon substrate (∼500 µm thick) bearing the high performance monolithically integrated devices into a flexible form (40 µm thick), without detrimentally affecting the pre-fabricated devices."
This concept has been confirmed in the team's work as even an intentionally non-optimized flexible form of PZT based ferroelectric capacitors on silicon surpassed the best reported values for ferroelectric capacitors built using alternative material systems.
In addition, as the researchers point out, the benefits of this approach would materialize further once flexible metal-oxide-semiconductor (MOS) field effect transistors (MOSFETs) are monolithically integrated to construct memory arrays and processors at a later stage. This is because electron mobility of polymeric semiconductors is much lower than that of silicon, leading to much slower electronics in terms of operation speeds.
PZT thin film device
a) Grazing incidence X-ray diffraction (GI-XRD) of as-deposited PZT thin film. b) Atomic force microscopy (AFM) measurement. c) Height profile of the dotted line in panel (b). d) Scanning electron microscopy (SEM) cross-section image depicting the thickness of the final fabric. (Reprinted with permission by Wiley-VCH Verlag) (click on image to enlarge)
"Worth mentioning, we anticipate that polymer based flexible electronics will be suitable for niche flexible applications due to their superior inherent flexibility but where high performance is not a strict requirement," says Hussain. "We expect to see a future flexible electronics industry spanning a huge spectrum with high performance / moderate flexibility devices at one end and high flexibility / moderate performance devices at the other end."
The next step for the team is to build a fully flexible PZT based FeRAM module through integrating MOS field effect access transistors with ferroelectric capacitors in a dense arraying architecture (i.e. cross bars) for a stand-alone flexible ferroelectric module and to evaluate the array performance under various out-of-plane mechanical stresses to assess the array's key memory functionalities in flexible form.
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